Back

Job opportunity @ Spintec [POSITION CLOSED]

An ASIC digital designer position is proposed, for a period of 12 months within the CNRS-CEA SPINTEC laboratory.

spintec.png
spOt Events & Results

An ASIC digital designer position is proposed, for a period of 12 months within the CNRS-CEA SPINTEC laboratory. A solid knowledge of digital design techniques, synthesis and Place and Route is required for this position, as well as knowledge of processor architectures. Since the global target is a low-power ASIC, knowledge in clock and/or power gating would be also appreciated. The full poposition is available here.

spin Orbit torque memory for cache & multicore processor applications

Private space

Menu principal